ICC world cup live score

IEEE paper:A Hybrid Simulated Annealing Algorithm for Nonslicing VLSI Floorplanning

M.tech or B.tech projects 

A Hybrid Simulated Annealing Algorithm for Nonslicing VLSI Floorplanning


ABSTRACT

Floorplanning in very large scale integrated-circuit (VLSI) design is the first phase in the process of designing the physical layout of a chip. This makes the floorplanning problem of paramount importance, since it determines the performance, size, yield, and reliability of VLSI chips .for full details go for follwing links

source:

http://ieeexplore.ieee.org/search/freesrchabstract.jsp?tp=&arnumber=5571036&openedRefinements%3D*%26sortType%3Ddesc_Publication+Year%26filter%3DAND%28NOT%284283010803%29%29%26searchField%3DSearch+All%26queryText%3DVLSI+Floorplanning